Part number:
CY7C1352
Manufacturer:
Cypress Semiconductor
File Size:
213.45 KB
Description:
256k x18 pipelined sram.
CY7C1352_CypressSemiconductor.pdf
Datasheet Details
The CY7C1352 is a 3.3V 256K by 18 synchronous-pipelined Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states.
The CY7C1352 is equipped with the advanced No Bus Latency™ (NoBL™) logic required to enable consecutive Read/Wri
CY7C1352 Features
* Pin compatible and functionally equivalent to ZBT™ devices MCM63Z818 and MT55L256L18P
* Supports 143-MHz bus operations with zero wait states
* Data is transferred on every clock
* Internally self-timed output buffer control to eliminate the need to use OE
CY7C1352_CypressSemiconductor.pdf
Datasheet Details
CY7C1352
Cypress Semiconductor
213.45 KB
256k x18 pipelined sram.
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