CY7C335 Datasheet - Cypress Semiconductor

CY7C335 Universal Synchronous EPLD

The CY7C335 is a high-performance, erasable, programmable logic device (EPLD) whose architecture has been optimized to enable the user to easily and efficiently construct very high performance state machines. The architecture of the CY7C335, consisting of the user-configurable output macrocell, bidi.

CY7C335 Features

* 100-MHz output registered operation

* Twelve I/O macrocells, each having:

* Registered, three-state I/O pins

* Input and output register clock select multiplexer

* Feed back multiplexer

CY7C335_CypressSemiconductor.pdf