CY7C344B - 32-Macrocell MAX EPLD
Available in a 28-pin, 300-mil DIP or windowed J-leaded ceramic chip carrier (HLCC), the CY7C344 represents the Logic Block Diagram [1] 15(22) 15(23) 27(6) 28(7) INPUT INPUT INPUT INPUT INPUT INPUT INPUT 1(8) 13(20) 14(21) INPUT/CLK 2(9) Pin Configurations HLCC Top View I/O I/O I/O VCC GND I/O I/O
CY7C344B Features
* High-performance, high-density replacement for TTL, 74HC, and custom logic
* 32 macrocells, 64 expander product terms in one LAB
* 8 dedicated inputs, 16 I/O pins
* 0.8-micron double-metal CMOS EPROM technology
* 28-pin, 300-mil DIP, cerDIP or 28-pin HLCC, P
