Description
( DataSheet : www.DataSheet4U.com ) CY7C1366A/GVT71256C36 CY7C1367A/GVT71512C18 256K x 36/512K x 18 Pipelined SRAM .
The Cypress Synchronous Burst SRAM family employs high-speed, low power CMOS designs using advanced triple-layer polysilicon, double-layer metal techn.
Features
* Fast access times: 2.5 ns, 3.0 ns, and 3.5 ns
* Fast clock speed: 225 MHz, 200 MHz, 166 MHz, and 150 MHz
* Fast OE access times: 2.5 ns, 3.0 ns, and 3.5 ns
* Optimal for performance (two cycle chip deselect, depth expansion without wait state)
* 3.3V
Applications
* JTAG boundary scan for B and T package version
* Low profile 119-bump, 14-mm x 22-mm PBGA (Ball Grid Array) and 100-pin TQFP packages and a 2-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input
