CY7C344B - 32-Macrocell MAX EPLD

Cypress Semiconductor

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Datasheet Details

Part number: CY7C344B
Manufacturer: Cypress Semiconductor
File Size: 241.81 KB
Datasheet: CY7C344B_CypressSemiconductor.pdf
Description: 32-Macrocell MAX EPLD

CY7C344B Product details

Description

Available in a 28-pin, 300-mil DIP or windowed J-leaded ceramic chip carrier (HLCC), the CY7C344 represents the Logic Block Diagram [1] 15(22) 15(23) 27(6) 28(7) INPUT INPUT INPUT INPUT INPUT INPUT INPUT 1(8) 13(20) 14(21) INPUT/CLK 2(9) Pin Configurations HLCC Top View I/O I/O I/O VCC GND I/O I/O 4 3 2 1 28 27 26 I/O INPUT INPUT INPUT INPUT/CLK I/O I/O 5 6 7 8 9 10 11 25 24 23 22 21 20 19 I/O I/O INPUT INPUT INPUT INPUT I/O I/O I/O I O C O N T R O L I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O

Features

High-performance, high-density replacement for TTL, 74HC, and custom logic.
32 macrocells, 64 expander product terms in one LAB.
8 dedicated inputs, 16 I/O pins.
0.8-micron double-metal CMOS EPROM technology.
28-pin, 300-mil DIP, cerDIP or 28-pin HLCC, PLCC package densest EPLD of this size. Eight dedicated inputs and 16 bidirectional I/O pins communicate to one logic array block. In the CY7C344 LAB there are 32 macrocells and 64 expander product ter.

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32-Macrocell MAX EPLD Cypress Semiconductor

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