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M12L128324A-7TG2C, M12L128324A Datasheet - ESMT

M12L128324A-7TG2C 1M x 32 Bit x 4 Banks Synchronous DRAM

The M12L128324A is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 1,048,576 words by 32 bits. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst .

M12L128324A-7TG2C Features

* JEDEC standard 3.3V power supply

* LVTTL compatible with multiplexed address

* Four banks operation

* MRS cycle with address key programs - CAS Latency (2 & 3) - Burst Length (1, 2, 4, 8 & full page) - Burst Type (Sequential & Interleave)

* All inputs are sampled at the positiv

M12L128324A_EliteSemiconductor.pdf

This datasheet PDF includes multiple part numbers: M12L128324A-7TG2C, M12L128324A. Please refer to the document for exact specifications by model.
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Datasheet Details

Part number:

M12L128324A-7TG2C, M12L128324A

Manufacturer:

ESMT

File Size:

1.11 MB

Description:

1m x 32 bit x 4 banks synchronous dram.

Note:

This datasheet PDF includes multiple part numbers: M12L128324A-7TG2C, M12L128324A.
Please refer to the document for exact specifications by model.

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TAGS

M12L128324A-7TG2C M12L128324A Bit Banks Synchronous DRAM ESMT

M12L128324A-7TG2C Distributor