Part number:
M15F2G16128A-EFBG2LS
Manufacturer:
ESMT
File Size:
3.70 MB
Description:
16m x 16 bit x 8 banks ddr3 sdram.
* and all of the control and address inputs are synchronized with a pair of externally supplied differential clocks. Inputs are latched at the cross point of differential clocks (CK rising and CK falling). All I/Os are synchronized with a single ended DQS or differential DQS pair in a source synchrono
M15F2G16128A-EFBG2LS Datasheet (3.70 MB)
M15F2G16128A-EFBG2LS
ESMT
3.70 MB
16m x 16 bit x 8 banks ddr3 sdram.
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