M15F2G16128A-BDBIG2B
ESMT
3.60 MB
16m x 16 bit x 8 banks ddr3 sdram.
ESMT
DDR3 SDRAM
Feature
z Interface and Power Supply * SSTL_15: VDD/VDDQ = 1.5V(±0.075V)
z JEDEC DDR.
The 2Gb Double-Data-Rate-3 (DDR3) DRAM is double data rate architecture to achieve high-speed operat.
📁 Related Datasheet
M15F2G16128A-BDBG2F - 16M x 16 Bit x 8 Banks DDR III SDRAM
(ESMT)
ESMT
DDR III SDRAM
Feature
z 1.5V ± 0.075V (JEDEC Standard Power Supply) z Programmable CAS Latency: 5, 6, 7, 8, 9, 10 and 11 z 8 Internal memory bank.
M15F2G16128A-DEBG2L - DDR3 SDRAM
(ESMT)
ESMT
DR3 SDRAM
Feature
Interface and Power Supply ˗ SSTL_15: VDD/VDDQ = 1.5V(±0.075V)
JEDEC DDR3 Compliant ˗ 8n Prefetch Architecture ˗ Differenti.
M15F2G16128A-DEBG2L - 16M x 16 Bit x 8 Banks DDR3 SDRAM
(ESMT)
ESMT
DR3 SDRAM
Feature
Interface and Power Supply ˗ SSTL_15: VDD/VDDQ = 1.5V(±0.075V)
JEDEC DDR3 Compliant ˗ 8n Prefetch Architecture ˗ Differenti.
M15F2G16128A-DEBG2LS - DDR3 SDRAM
(ESMT)
ESMT
DR3 SDRAM
Feature
Interface and Power Supply ˗ SSTL_15: VDD/VDDQ = 1.5V(±0.075V)
JEDEC DDR3 Compliant ˗ 8n Prefetch Architecture ˗ Differenti.
M15F2G16128A-DEBG2LS - 16M x 16 Bit x 8 Banks DDR3 SDRAM
(ESMT)
ESMT
DR3 SDRAM
Feature
Interface and Power Supply ˗ SSTL_15: VDD/VDDQ = 1.5V(±0.075V)
JEDEC DDR3 Compliant ˗ 8n Prefetch Architecture ˗ Differenti.
M15F2G16128A-DEBIG2B - 16M x 16 Bit x 8 Banks DDR3 SDRAM
(ESMT)
ESMT
DDR3 SDRAM
Feature
z Interface and Power Supply SSTL_15: VDD/VDDQ = 1.5V(±0.075V)
z JEDEC DDR3 Compliant 8n Prefetch Architecture Different.
