GS9020 - 2A Sink/Source Bus Termination Regulator
The GS9020 is a simple, cost-effective and high-speed linear regulator designed to generate termination voltage in double data rate (DDR) memory system to comply with the JEDEC SSTL_2 and SSTL_18 or other specific interfaces such as HSTL, SCSI-2 and SCSI-3 etc.
devices requirements.
The regulator is
GS9020 Features
* include extremely low initial offset voltage, excellent load regulation, current limiting in bi-directions and on-chip thermal shut-down protection. The GS9020 are available in the PSOP-8 (Expos
