HD74ALVCH16821 Datasheet PDF - Hitachi Semiconductor 3.3-V 20-bit Bus Interface Flip Flops with 3-state Outputs Specs

HD74ALVCH16821 - 3.3-V 20-bit Bus Interface Flip Flops with 3-state Outputs

Datasheet Summary

Description

The HD74ALVCH16821 can be used as two 10-bit flip flops or one 20-bit flip flop.

The 20 flip flops are edge triggered D-type flip flops.

On the positive transition of the clock (CLK) input, the device provides true data at the Q outputs.

Features

VCC = 2.3 V to 3.6 V.
Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C).
Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C).
High output current ±24 mA (@V CC = 3.0 V).
Bus hold on data inputs eliminates the need for external pullup / pulldown resistors HD74ALVCH16821 Function Table Inputs OE L L L H CLK ↑ ↑ H or L X D H L X X H L Q0.
1 Z Output Q H : High level L : Low level X : Immaterial Z : High impedance ↑ : Low to high tra.

Datasheet Details

Part number	HD74ALVCH16821
Manufacturer	Hitachi Semiconductor
File Size	51.32 KB
Description	3.3-V 20-bit Bus Interface Flip Flops with 3-state Outputs
Datasheet	HD74ALVCH16821 Datasheet
Additional preview pages of the HD74ALVCH16821 datasheet.

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Full PDF Text Transcription

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HD74ALVCH16821 3.3-V 20-bit Bus Interface Flip Flops with 3-state Outputs ADE-205-171B (Z) 3rd. Edition December 1999 Description The HD74ALVCH16821 can be used as two 10-bit flip flops or one 20-bit flip flop. The 20 flip flops are edge triggered D-type flip flops. On the positive transition of the clock (CLK) input, the device provides true data at the Q outputs. A buffered output enable ( OE ) input can be used to place the ten outputs in either a normal logic state (high or low levels) or a high impedance state. In the high impedance state, the outputs neither load nor drive the bus lines significantly. The high impedance state and increased drive provide the capability to drive bus line without need for interface or pullup components.

Published: Mar 23, 2005 |