HD74ALVCH16831 Datasheet PDF - Hitachi Semiconductor 1-to 4 Address Register / Driver with 3-state Outputs Specs

HD74ALVCH16831 - 1-to 4 Address Register / Driver with 3-state Outputs

Datasheet Summary

Description

This 1-bit to 4-bit address register / driver is designed for 2.3 V to 3.6 V VCC operation.

The device is ideal for use in applications in which a single address bus is driving four separate memory locations.

Features

VCC = 2.3 V to 3.6 V.
Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C).
Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C).
High output current ±24 mA (@VCC = 3.0 V).
Bus hold on data inputs eliminates the need for external pullup / pulldown resistors HD74ALVCH16831 Function Table Inputs OE H L L L L SEL X H H L L CLK X X X ↑ ↑ A X L H L H Z L H L H Output Y H : High level L : Low level X : Immaterial Z : High impedance ↑ : Low to.

Datasheet Details

Part number	HD74ALVCH16831
Manufacturer	Hitachi Semiconductor
File Size	60.23 KB
Description	1-to 4 Address Register / Driver with 3-state Outputs
Datasheet	HD74ALVCH16831 Datasheet
Additional preview pages of the HD74ALVCH16831 datasheet.

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Full PDF Text Transcription

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HD74ALVCH16831 1-to 4 Address Register / Driver with 3-state Outputs ADE-205-194 (Z) Preliminary 1st. Edition March 1998 Description This 1-bit to 4-bit address register / driver is designed for 2.3 V to 3.6 V VCC operation. The device is ideal for use in applications in which a single address bus is driving four separate memory locations. The HD74ALVCH16831 can be used as a buffer or a register, depending on the logic level of the select (SEL) input. When SEL is logic high, the device is in the buffer mode. The outputs follow the inputs and are controlled by the two output enable (OE) controls. Each OE controls two groups of nine outputs. When SEL is logic low, the device is in the register mode. The register is an edge triggered D-type flip flop.

Published: Mar 23, 2005 |