HD74LV373A Datasheet - Hitachi Semiconductor

Octal D-type Transparent Latches with 3-state Outputs

HD74LV373A Features

* VCC = 2.0 V to 5.5 V operation All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) All outputs VO (Max.) = 5.5 V (@VCC = 0 V) Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) Typical VOH undershoot > 2.3 V (@VCC = 3.3 V, Ta = 25°

HD74LV373A General Description

The HD74LV373A has eight D type latches with three state outputs in a 20 pin package. When the latch enables input is high, the Q outputs will follow the D inputs. When the latch enables goes low, data at the D inputs will be retained at the outputs until latch enable returns high again. When a high.

HD74LV373A Datasheet (69.26 KB)

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HD74LV373A

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Hitachi Semiconductor

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69.26 KB

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Octal d-type transparent latches with 3-state outputs.

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HD74LV373A Octal D-type Transparent Latches with 3-state Outputs Hitachi Semiconductor

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HD74LV373A Features

HD74LV373A General Description

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