H57V1262GFR Datasheet (Hynix Semiconductor) - 128Mb Synchronous DRAM based on 2M x 4Bank x16 I/O

H57V1262GFR, 128Mb Synchronous DRAM based on 2M x 4Bank x16 I/O

and is subject to change without notice.

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Rev.

1.0 / Aug.

2009 1 www.DataSheet4U.com Synchronous DRAM Memory 128Mbit (8Mx16bit) H57V1262GFR Series DESCRIPTION The Hynix H57V1262GFR series is a 13

H57V1262GFR Features

* Voltage: VDD and VDDQ 3.3V supply voltage All device pins are compatible with LVTTL interface 54 Ball FBGA (Lead or Lead Free Package) All inputs and outputs referenced to positive edge of system clock Data mask function by UDQM, LDQM