H57V1262GTR Datasheet (Hynix Semiconductor) - 128Mb Synchronous DRAM based on 2M x 4Bank x16 I/O

H57V1262GTR, 128Mb Synchronous DRAM based on 2M x 4Bank x16 I/O

and is subject to change without notice.

Hynix Semiconductor does not assume any responsibility for use of circuits described.

No patent licenses are implied.

Rev.

1.0 / Aug.

2009 1 www.DataSheet4U.com Synchronous DRAM Memory 128Mbit (8Mx16bit) H57V1262GTR Series H57V1262GTRDESCRIPTION The Hynix H

H57V1262GTR Features

* Voltage: VDD, VDDQ 3.3V supply voltage All device pins are compatible with LVTTL interface 54 Pin TSOPII (Lead Free Package) All inputs and outputs referenced to positive edge of system clock Data mask function by UDQM, LDQM