HY57V561620 Datasheet - Hynix Semiconductor

HY57V561620 4Banks x 4M x 16Bit Synchronous DRAM

The HY57V561620T is a 268,435,456bit CMOS Synchronous DRAM, ideally suited for the main memory applications which require large memory density and high bandwidth. HY57V561620 is organized as 4 banks of 4,194,304x16. The HY57V561620T is offering fully synchronous operation referenced to a positive ed.

HY57V561620 Features

* Single 3.3V ± 0.3V power supply All device pins are compatible with LVTTL interface JEDEC standard 400mil 54pin TSOP-II with 0.8mm of pin pitch All inputs and outputs referenced to positive edge of system clock Data mask function by UDQM and LDQM Internal four banks ope

HY57V561620_HynixSemiconductor.pdf