HY5S5B6ELF-HE Datasheet (Hynix Semiconductor) - 256MBit MOBILE SDR SDRAMs based on 4M x 4Bank x16 I/O

HY5S5B6ELF-HE, 256MBit MOBILE SDR SDRAMs based on 4M x 4Bank x16 I/O

and is subject to change without notice.

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Rev 1.0 / Jul.

2005 1 1 256Mbit (16Mx16bit) Mobile SDR Memory HY5S5B6ELF(P)-xE Series DESCRIPTION The Hynix Low Power SDRAM(Mobile SDR) is suited for non

HY5S5B6ELF-HE Features

* Standard SDRAM Protocol

* Programmable CAS latency of 1, 2 or 3 -25oC ~ 85oC Operation Package Type : 54ball, 0.8mm pitch FBGA (Lead Free, Lead) Internal 4bank operation Power Supply Voltage : VDD = 1.8V, VDDQ = 1.8V LVCMOS compatible I/O Interface Low Voltage interface to reduce I/O pow