HY5S7B6ALFP-S, HY5S7B6ALFP-6 Datasheet - Hynix Semiconductor

HY5S7B6ALFP-S 512MBit MOBILE SDR SDRAMs based on 8M x 4Bank x16I/O

and is subject to change without notice. Hynix does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev 1.1 / July. 2007 1 512Mbit (32Mx16bit) Mobile SDR Memory HY5S7B6ALF(P) Series DESCRIPTION The Hynix HY5S7B6ALF(P) is suited for non-PC application whi.

HY5S7B6ALFP-S Features

* Standard SDRAM Protocol Clock Synchronization Operation - All the commands registered on positive edge of basic input clock (CLK) MULTIBANK OPERATION - Internal 4bank operation - During burst Read or Write operation, burst Read or Write for a different bank is performed. - During burst Read or Write

HY5S7B6ALFP-6_HynixSemiconductor.pdf

HY5S7B6ALFP-S Datasheet Preview — This datasheet PDF includes multiple part numbers: HY5S7B6ALFP-S, HY5S7B6ALFP-6. Please refer to the document for exact specifications by model.

Datasheet Details

Part number:

HY5S7B6ALFP-S, HY5S7B6ALFP-6

Manufacturer:

Hynix Semiconductor

File Size:

656.38 KB

Description:

512mbit mobile sdr sdrams based on 8m x 4bank x16i/o.

Note:

This datasheet PDF includes multiple part numbers: HY5S7B6ALFP-S, HY5S7B6ALFP-6.
Please refer to the document for exact specifications by model.

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HY5S7B6ALFP-S HY5S7B6ALFP-6 512MBit MOBILE SDR SDRAMs based 4Bank x16I Hynix Semiconductor

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