HY5S7B6LFP-S Datasheet - Hynix Semiconductor

HY5S7B6LFP-S 512MBit MOBILE SDR SDRAMs based on 8M x 4Bank x16I/O

and Figures Final Version History Draft Date Oct. 2004 May. 2005 Aug. 2006 Aug. 2006 Jan. 2007 Remark Preliminary Preliminary Preliminary Preliminary www.DataSheet4U.com This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility.

HY5S7B6LFP-S Features

* Standard SDRAM Protocol Clock Synchronization Operation - All the commands registered on positive edge of basic input clock (CLK) MULTIBANK OPERATION - Internal 4bank operation - During burst Read or Write operation, burst Read or Write for a different bank is performed. - During burst

HY5S7B6LFP-S Datasheet (709.96 KB)

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Datasheet Details

Part number:

HY5S7B6LFP-S

Manufacturer:

Hynix Semiconductor

File Size:

709.96 KB

Description:

512mbit mobile sdr sdrams based on 8m x 4bank x16i/o.

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HY5S7B6LFP-S 512MBit MOBILE SDR SDRAMs based 4Bank x16I Hynix Semiconductor

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