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ICS9LPRS502 Datasheet - IDT

ICS9LPRS502 - 56-PIN CK505 W/FULLY INTEGRATED VOLTAGE REGULATOR + INTEGRATED SERIES RESISTOR

PIN # PIN NAME TYPE DESCRIPTION 3.3V PCI clock output or Clock Request control A for either SRC0 or SRC2 pair The power-up default is PCI0 output, but this pin may also be used as a Clock Request control of SRC pair 0 or SRC pair 2 via SMBus.

Before configuring this pin as a Clock Request Pin, the P

Datasheet 56-PIN CK505 W/FULLY INTEGRATED VOLTAGE REGULATOR + INTEGRATED SERIES RESISTOR Recommended Application: CK505 compliant clock with fully integrated voltage regulator and Internal series resistor on differential outputs, PCIe Gen 1 compliant ICS9LPRS502 Key Specifications: CPU outputs cycle-cycle jitter < 85ps SRC output cycle-cycle jitter < 125ps PCI outputs cycle-cycle jitter < 250ps +/- 100ppm frequency accuracy on CPU & SRC clocks Output F

ICS9LPRS502 Features

* 2 - CPU differential low power push-pull pairs 7 - SRC differential low power push-pull pairs 1 - CPU/SRC selectable differential low power push-pull pair 1 - SRC/DOT selectable differential low power push-pull pair 5 -

ICS9LPRS502-IDT.pdf

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Datasheet Details

Part number:

ICS9LPRS502

Manufacturer:

IDT

File Size:

315.87 KB

Description:

56-pin ck505 w/fully integrated voltage regulator + integrated series resistor.

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