ICS9LPRS535 Datasheet - Renesas

ICS9LPRS535 VREG

PIN # PIN NAME 1 PCI0/CR#_A 2 VDDPCI 3 PCI4/SRC5_EN 4 PCI_F5/ITP_EN 5 GNDPCI 6 VDD48 7 USB_48MHz/FSLA 8 GND48 9 VDD96_IO 10 DOT96T_LPR/SRCT0_LPR 11 DOT96C_LPR/SRCC0_LPR 12 GND TYPE DESCRIPTION 3.3V PCI clock output or CR#_A input. Default is PCI0. To configure this pin as CR#_A, the PCI ou.

ICS9LPRS535 Features

* Integrated Series Resistors on differential outputs

* 2 - CPU differential push-pull pairs

* 4 - SRC differential push-pull pairs

* 1 - CPU/SRC selectable differential push-pull pair

* 1 - SRC/DOT selectable differential push-pull pair

* 1- SRC/Stop

ICS9LPRS535 Datasheet (395.28 KB)