IS61DDSB21M18C Datasheet - ISSI

IS61DDSB21M18C 18Mb DDR-II SIO SYNCHRONOUS SRAM

The 18Mb IS61DDSB251236C and IS61DDSB21M18C are synchronous, high-performance CMOS static random access memory (SRAM) devices. These SRAMs have a separate I/O bus. The rising edge of K clock initiates the read/write operation, and all internal operations are self-timed. Refer to the Timing Reference.

IS61DDSB21M18C Features

* 512Kx36 and 1Mx18 configuration available.

* On-chip delay-locked loop (DLL) for wide data valid window.

* Seperate I/O read and write ports.

* Synchronous pipeline read with self-timed late write operation.

* Double Data Rate (DDR) interface for read and write input ports.

IS61DDSB21M18C-ISSI.pdf

IS61DDSB21M18C Datasheet Preview — Preview of IS61DDSB21M18C PDF

Datasheet Details

Part number:

IS61DDSB21M18C

Manufacturer:

ISSI

File Size:

954.42 KB

Description:

18mb ddr-ii sio synchronous sram.

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IS61DDSB21M18C IS61DDSB21M18C 18Mb DDR-II SIO SYNCHRONOUS SRAM ISSI

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