IS61DDSB251236C Features
* 512Kx36 and 1Mx18 configuration available.
* On-chip delay-locked loop (DLL) for wide data valid window.
* Seperate I/O read and write ports.
* Synchronous pipeline read with self-timed late write operation.
* Double Data Rate (DDR) interface for read and write input ports.
Datasheet Details
IS61DDSB251236C, IS61DDSB21M18C
ISSI
954.42 KB
18mb ddr-ii sio synchronous sram.
This datasheet PDF includes multiple part numbers: IS61DDSB251236C, IS61DDSB21M18C.
Please refer to the document for exact specifications by model.
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IS61DDSB251236C Distributor
