IS61DDSB21M36A Datasheet - Integrated Silicon Solution

IS61DDSB21M36A 36Mb DDR-II (Burst 2) SIO SYNCHRONOUS SRAM

The 36Mb IS61DDSB21M36A and IS61DDSB22M18A are synchronous, high-performance CMOS static random access memory (SRAM) devices. These SRAMs have a separate I/O bus. The rising edge of K clock initiates the read/write operation, and all internal operations are self-timed. Refer to the Timing Reference .

IS61DDSB21M36A Features

* 1Mx36 and 2Mx18 configuration available.

* On-chip delay-locked loop (DLL) for wide data valid window.

* Seperate I/O read and write ports.

* Synchronous pipeline read with self-timed late write operation.

* Double Data Rate (DDR) interface for read and write input ports.

IS61DDSB21M36A Datasheet (761.53 KB)

IS61DDSB21M36A Datasheet Preview — Preview of IS61DDSB21M36A PDF

Datasheet Details

Part number:

IS61DDSB21M36A

Manufacturer:

Integrated Silicon Solution

File Size:

761.53 KB

Description:

36mb ddr-ii (burst 2) sio synchronous sram.

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