IS61NLP51218A

9Mb STATE BUS SRAM

ISSI

* 100 percent bus utilization

* No wait cycles between Read and Write

* Internal self-timed write cycle

* Individual Byte Write Control

* Single R/W (Read/Write) control pin

* Clock controlled, registered address, data and control

* Interleaved

IS61NLP51218A

ISSI

681.44 KB

9mb state bus sram .

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IS61NLP51218A 9Mb STATE BUS SRAM ISSI

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