ICS86953I-147 Datasheet, Buffer, Integrated Circuit Systems

ICS86953I-147 Features

• Buffer
• 9 single ended LVCMOS/LVTTL outputs; (8) clocks, (1) feedback
• PCLK, nPCLK pair can accept the following differential input levels: LVPECL, CML, SSTL
• Maximu

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ICS86953I-147

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Integrated Circuit Systems

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📄 Datasheet

Description:

1-to-9 differential-to-lvcmos / lvttl zero delay buffer. The ICS86953I-147 is a low voltage, low skew 1-to-9 Differential-to-LVCMOS/LVTTL Clock HiPerClockS™ Generator and a member of the HiP

ICS86953I-147 Application

• Applications Along with a fully integrated PLL, the ICS86953I-147 contains frequency configurable outputs and an external feedback input for regene

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ICS86953I-147

Integrated Circuit Systems

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