* DESCRIPTION: IDTCSPU877A
* 1 to 10 differential clock distribution
* Optimized for clock distribution in DDR2 (Double Data Rate) SDRAM applications
* Operating frequency: 125MHz to 270MHz
* Very low skew: ≤40ps
* Very low jitter: ≤40ps
* 1.8V AVDD a
IDTCSPU877A Datasheet (179.31 KB)
IDTCSPU877A
Integrated Device Technology
179.31 KB
1.8v phase locked loop differential 1:10 sdram clock driver.
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IDTCSPU877A 1.8V PLL DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER
COMMERCIAL TEMPERATURE RANGE
1.8V PHASE LOCKED LOOP DIFFERENTIAL 1:10.
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