Part number:
IDTCSP2510C
Manufacturer:
Integrated Device
File Size:
63.40 KB
Description:
3.3v phase-lock loop clock driver zero delay buffer.
IDTCSP2510C Datasheet (63.40 KB)
* Phase-Lock Loop Clock Distribution for Synchronous DRAM Applications
* Distributes one clock input to one bank of ten outputs
* Output enable bank control
* External feedback (FBIN) pin is used to synchronize the outputs to the clock input signal
* No exter
IDTCSP2510C Datasheet (63.40 KB)
IDTCSP2510C
Integrated Device
63.40 KB
3.3v phase-lock loop clock driver zero delay buffer.
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