IDTCSP2510C Datasheet, Buffer, Integrated Device

IDTCSP2510C Features

• Buffer
• Phase-Lock Loop Clock Distribution for Synchronous DRAM Applications
• Distributes one clock input to one bank of ten outputs
• Output enable bank control

PDF File Details

Part number:

IDTCSP2510C

Manufacturer:

Integrated Device

File Size:

63.40kb

Download:

📄 Datasheet

Description:

3.3v phase-lock loop clock driver zero delay buffer. FUNCTIONAL BLOCK DIAGRAM 11 G 3 Y0 4 Y1 5 Y2 8 Y3 9 Y4 15 Y5 16 Y6 17 CLK 24 PLL 13 FBIN 21 AV DD 23 12 FBOUT Y9 20 Y8 Y7 ºC TEMP

IDTCSP2510C Application

• Applications
• Distributes one clock input to one bank of ten outputs
• Output enable bank control
• External feedback (FBIN

TAGS

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