MPC2105P, MPC2104P Datasheet - Motorola

MPC2105P 512KB and 1MB BurstRAM

Pin Locations 66, 67, 68, 69, 71, 72, 73, 74, 76, 77, 78, 80, 81, 82, 83, 155, 156, 157, 158, 160, 161, 162, 163, 165, 166, 167, 169, 170, 171 64 172 59 30, 56, 115 153 138, 148 4, 5, 6, 7, 10, 11, 12, 14, 6, 17, 19, 20, 22, 24, 25, 26, 27, 93, 94, 95, 96, 99, 100, 101, 103, 105, 106, 108, 109, 111.

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MPC2104P/D Product Preview 256KB/512KB BurstRAM™ Secondary Cache Modules for PowerPC™ PReP/CHRP Platforms The MPC2104P (256KB) and MPC2105P (512KB) are designed to provide burstable, high performance L2 cache for the PowerPC 60x microprocessor family in conformance with the PowerPC Reference Platform (PReP) and the PowerPC Common Hardware Reference Platform (CHRP) specifications. The MPC2104P and MPC2105P utilize synchronous BurstR.

MPC2105P Features

* ROLA FAST SRAM ABSOLUTE MAXIMUM RATINGS (Voltages Referenced to VSS = 0 V) Rating Power Supply Voltage Voltage Relative to VSS Output Current (per I/O) Power Dissipation Temperature Under Bias Operating Temperature Storage Temperature Tag Data RAM Tag Data RAM Tag Data RAM Symbol VCC VDD Vin, Vout

MPC2104P_Motorola.pdf