MPC9120 Datasheet - Motorola

MPC9120 1:10 LVCMOS FANOUT BUFFER

Pin Name BUF_IN SDRAM0:9 SDATA SCLK OE VDD VSS I/O I O I/O I I * * 3.3V CMOS clock input 3.3V CMOS SDRAM clock outputs Serial data for configuration control Serial clock input for configuration control. The state of the SDATA input is clocked into the device on the rising edge of th.

MPC9120 Features

* 10 low skew outputs optimized to drive the clock inputs of standard unbuffered SO

* DIMM SDRAM modules. Standard unbuffered SO

* DIMM SDRAM modules require two clocks per module allowing for the device to drive up to four modules. The output buffers have been optimized to drive the load

MPC9120_Motorola.pdf