MPC9140 - 1:18 LVCMOS FANOUT BUFFER
Pin Name BUF_IN SDRAM0:17 SDATA SCLK OE VDD VSS I/O I O I/O I I * * 3.3V CMOS clock input 3.3V CMOS SDRAM clock outputs Serial data for configuration control Serial clock input for configuration control.
The state of the SDATA input is clocked into the device on the rising edge of t
MPC9140 Features
* 18 low skew outputs optimized to drive the clock inputs of standard unbuffered SDRAM modules. Standard unbuffered SDRAM modules require four clocks per module allowing for the device to drive up to four modules. The output buffers have been optimized to drive the load presented by the SDRAM module.
