MTD20N03HDL Datasheet (Motorola)

MTD20N03HDL, TMOS POWER FET

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MTD20N03HDL/D ™ Data Sheet HDTMOS E-FET.™ High Density Power FET DPAK for Surface Mount Designer's MTD20N03HDL Motorola Preferred Device N Channel Enhancement Mode Silicon Gate This advanced HDTMOS power FET is designed to withstand high energy in the avalanche and commutation modes.

This new energy efficient design also offers a drain to source diode with a fast recovery time.

Designed for low volt

MTD20N03HDL Features

* the curves would maintain a value of unity regardless of the switching speed. The circuit used to obtain the data is constructed to minimize common inductance in the drain and gate circuit loops and is believed readily achievable with board mounted components. Most power electronic loads are induct