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PCK2509S Datasheet - NXP

PCK2509S 50-150 MHz 1:9 SDRAM clock driver

The PCK2509S is a high-performance, low-skew, low-jitter, phase-locked loop (PLL) clock driver. It uses a PLLto precisely align, in both frequency and phase, the feedback (FBOUT) output to the clock (CLK) input signal. It is specifically designed for use with synchronous DRAMs. The PCK2509S operates.

PCK2509S Features

* Phase-Locked Loop Clock distribution for PC100/PC133 SDRAM applications

* Spread Spectrum clock compatible

* Operating frequency 50 to 150 MHz

* (tphase error

* jitter) at 100 to133 MHz = ±50 ps

* Jitter (peak-peak) at 100 to 133 MHz = ± 80 ps

PCK2509S Datasheet (70.65 KB)

Preview of PCK2509S PDF
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Datasheet Details

Part number:

PCK2509S

Manufacturer:

NXP ↗

File Size:

70.65 KB

Description:

50-150 mhz 1:9 sdram clock driver.

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TAGS

PCK2509S 50-150 MHz SDRAM clock driver NXP

PCK2509S Distributor