ADC14C065 - A/D Converter

National Semiconductor

Datasheet Details

NOTE: This is Advance Information for products currently in development..

n n n n n n n n n n 1 GHz Full Power Bandwidth Internal sample-and-hold circuit Low power consumption Internal precision reference Data Ready output clock Clock Duty Cycle Stabilizer Single +3.3V supply operation Power-down mode Offset binary or 2’s complement output data format 32-pin LLP package, (5x5x0.8mm, 0.5mm pin-pitch) Key Specifications n n n n n n n For ADC14C105 Resolution Conversion Rate SNR (fIN = 240 MHz) SFDR (fIN = 240 MHz) Full Power Bandwidth Power Consumption 14 Bits 105 MSPS.

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