* n n n n n n n n n n 1 GHz Full Power Bandwidth Internal sample-and-hold circuit Low power consumption Internal precision reference Data Ready output clock Clock Duty Cycle Stabilizer Single +3.3V supply operation Power-down mode Offset binary or 2’s complement output data format 32-pin LLP package,
ADC14C065 Datasheet (640.67 KB)
ADC14C065
National Semiconductor
640.67 KB
A/d converter.
ADC14C065/ADC14C080/ADC14C095/ADC14C105 14-Bit, 65/80/95/105 MSPS A/D Converter ADVANCE INFORMATION September 2006 ADC14C065/ADC14C080/ADC14C095/ADC.
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