* 1 GHz Full Power Bandwidth Internal sample-and-hold circuit and precision reference Low power consumption Clock Duty Cycle Stabilizer Single +3.3V supply operation Offset binary or 2's complement output data format Serial LVDS Outputs 60-pin LLP packag
ADC14DS105 Datasheet (696.14 KB)
ADC14DS105
National Semiconductor
696.14 KB
A/d converter.
ADC14DS065/ADC14DS080/ADC14DS095/ADC14DS105 Dual 14-Bit A/D Converter
ADVANCE INFORMATION
February 2007
ADC14DS065/ADC14DS080/ADC14DS095/ADC14DS105 .
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