CLC5902 - Dual Digital Tuner/AGC
The CLC5902 block diagram is shown in Figure 2.
The CLC5902 contains two identical digital down-conversion (DDC) circuits.
Each DDC accepts a 14-bit sample at up to 52MSPS, down converts from a selected carrier frequency to baseband, decimates the signal rate by a programmable factor ranging from 3
May 1999 CLC5902 Dual Digital Tuner/AGC N CLC5902 Dual Digital Tuner/AGC 0 0 General Overview The CLC5902 Dual Digital Tuner/AGC IC is a two channel digital downconverter (DDC) with integrated automatic gain control (AGC).
The CLC5902 is a key component in the Diversity Receiver Chipset (DRCS) which includes one CLC5902 Dual Digital Tuner/AGC, two CLC5956 12-bit analog-to-digital converters (ADCs), and two CLC5526 digitally controlled variable gain amplifiers (DVGAs).
A block diagram for a Di
CLC5902 Features
* n 52MSPS Operation n Two Independent Channels with n n n n n n n n n n n n 14-bit inputs Greater than 100 dB image rejection Greater than 100 dB spurious free dynamic range 0.02 Hz tuning resolution User Programmable AGC Channel Filters include a Fourth Order CIC followed by 21-tap and 63-tap Symmet