CLC5903 - Dual Digital Tuner / AGC
The CLC5903 block diagram is shown in Figure 2.
The CLC5903 contains two identical digital down-conversion (DDC) circuits.
Each DDC accepts an independently clocked 14-bit sample at up to 78MSPS, down converts from a selected carrier frequency to baseband, decimates the signal rate by a programmable
CLC5903 Dual Digital Tuner / AGC June 2004 N 0 0 Na t i on a l S e m i c o n du c t o r CLC5903 Dual Digital Tuner / AGC General Overview The CLC5903 Dual Digital Tuner / AGC IC is a two channel digital downconverter (DDC) with integrated automatic gain control (AGC).
The CLC5903 is a key component in the Enhanced Diversity Receiver Chipset (EDRCS) which includes one CLC5903 Dual Digital Tuner / AGC, two CLC5957 12-bit analog-to-digital converters (ADCs), and two CLC5526 digitally controlled
CLC5903 Features
* 78MSPS Operation Low Power, 145mW/channel, 52 MHz, Dec=192 Two Independent Channels with 14-bit inputs Serial Daisy-cha
