DS90CR287 Datasheet - National Semiconductor

DS90CR287 28-Bit Channel Link

The DS90CR287 transmitter converts 28 bits of CMOS/TTL data into four LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. Every cycle of the transmit clock 28 bits of input data are sampled and.

DS90CR287 Features

* n n n n n n n n n n n n n 20 to 85 MHZ shift clock support 50% duty cycle on receiver output clock Best

* in

* Class Set & Hold Times on TxINPUTs Low power consumption ± 1V common mode range (around +1.2V) Narrow bus reduces cable size and cost Up to 2.38 Gbps throughput Up to 297.5 Mega

DS90CR287 Datasheet (308.30 KB)