DS90CR286 Datasheet - National Semiconductor

DS90CR286 +3.3V Rising Edge Data Strobe LVDS

The DS90CR285 transmitter converts 28 bits of CMOS/TTL data into four LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. Every cycle of the transmit clock 28 bits of input data are sampled and.

DS90CR286 Features

* n n n n n n n n n n n n n n Single +3.3V supply Chipset (Tx + Rx) power consumption < 250 mW (typ) Power-down mode ( < 0.5 mW total) Up to 231 Megabytes/sec bandwidth Up to 1.848 Gbps data throughput Narrow bus reduces cable size 290 mV swing LVDS devices for low EMI +1V common mode range (around +1

DS90CR286_NationalSemiconductor.pdf