DS90CR288 Datasheet - National Semiconductor

DS90CR288 +3.3V Rising Edge Data Strobe LVDS

The DS90CR287 (see DS90CR287/288A datasheet) transmitter converts 28 bits of CMOS/TTL data into four LVDS (Low Voltage Differential Signaling) data streams. A phaselocked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. Every cycle of the transmit clock 28 bits.

DS90CR288 Features

* n 20 to 75 MHz shift clock support n 50% duty cycle on receiver output clock n Best-in-Class Set & Hold Times on TxINPUTs and RxOUTPUTs n Low power consumption n Tx + Rx Powerdown mode < 400µW (max) n ± 1V common-mode range (around +1.2V) n Narrow bus reduces cable size and cost n Up to 2.10 Gbps th

DS90CR288 Datasheet (229.57 KB)