DS99R105 (DS99R105 / DS99R106) 3-40MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer

National Semiconductor

Description

DS99R105/DS99R106 3-40MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer October 2007 www.DataSheet4U.com DS99R105/DS99R106 3-40MHz DC-Balance.
The DS99R105/DS99R106 Chipset translates a 24-bit parallel bus into a fully transparent data/control LVDS serial stream with embedded clock informatio.

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Datasheet Specifications

Part number: DS99R105
Manufacturer: National Semiconductor
File Size: 959.92 KB
Datasheet: DS99R105_NationalSemiconductor.pdf
Description: (DS99R105 / DS99R106) 3-40MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer

Features

* pre-emphasis to boost signals over longer distances using lossy cables. Internal DC balanced encoding/decoding is used to support AC-Coupled interconnects.
* Internal DC Balancing encode/decode
* Supports AC

Applications

* LOCK output flag to ensure data integrity at Receiver side Balanced TSETUP/THOLD between RCLK and RDATA on Receiver side PTO (progressive turn-on) LVCMOS outputs to reduce EMI and minimize SSO effects All LVCMOS inputs and control pins have internal pulldown On-chip filters for PLLs on Transmitter a

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📁 Related Datasheet

DS99R101 DS99R102 DS99R103 DS99R104 DS99R106 DS99R124AQ

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DS99R105 DS99R105 DS99R106 3-40MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer National Semiconductor

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