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DS90C032B LVDS Quad CMOS Differential Line Receiver

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Description

DS90C032BLVDS Quad CMOS Differential Line Receiver September 2003 DS90C032B LVDS Quad CMOS Differential Line Receiver General .
TheDS90C032B is a quad CMOS differential line receiver designed for applications requiring ultra low power dissipation and high data rates.

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Datasheet Specifications

Part number
DS90C032B
Manufacturer
National Semiconductor
File Size
171.22 KB
Datasheet
DS90C032B_NationalSemiconductor.pdf
Description
LVDS Quad CMOS Differential Line Receiver

Features

* n >155.5 Mbps (77.7 MHz) switching rates n Accepts small swing (350 mV) differential signal levels n High Impedance LVDS inputs with power down n Ultra low power dissipation n 600 ps maximum differential skew (5V, 25˚C) n 6.0 ns maximum propagation delay n Industrial operating temperature range n Av

Applications

* requiring ultra low power dissipation and high data rates. The device is designed to support data rates in excess of 155.5 Mbps (77.7 MHz) utilizing Low Voltage Differential Signaling (LVDS) technology. TheDS90C032B accepts low voltage (350 mV) differential input signals and translates them to CMOS

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