* 1 5-MHz to 35-MHz Clock Embedded and DCBalancing 24:1 and 1:24 Data Transmissions
* User Defined Pre-Emphasis Driving Ability Through External Resistor on LVDS Outputs and Capable to Drive Up to 10-Meter Shielded Twisted-Pair Cable
* User-Selectable Clock Edge for Parallel D
DS90C124
2.18 MB
5-mhz to 35-mhz dc-balanced 24-bit fpd-link ii serializer/deserializer.
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DS90C124, DS90C241
SNLS209M
* NOVEMBER 2005
* R.
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