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DS90C124, DS90C241 - 5-MHz to 35-MHz DC-Balanced 24-Bit FPD-Link II Serializer/Deserializer

DS90C124 Description

Product Folder Order Now Technical Documents Tools & Software Support & Community DS90C124, DS90C241 SNLS209M * NOVEMBER 2005 * R.
The DS90C241 and DS90C124 chipset translates a 24-bit parallel bus into a fully transparent data and control LVDS serial stream with embedded clock in.

DS90C124 Features

* 1 5-MHz to 35-MHz Clock Embedded and DCBalancing 24:1 and 1:24 Data Transmissions
* User Defined Pre-Emphasis Driving Ability Through External Resistor on LVDS Outputs and Capable to Drive Up to 10-Meter Shielded Twisted-Pair Cable
* User-Selectable Clock Edge for Parallel D

DS90C124 Applications

* LOCK Output Flag to Ensure Data Integrity at Receiver Side
* Balanced TSETUP and THOLD Between RCLK and RDATA on Receiver Side
* PTO (Progressive Turnon) LVCMOS Outputs to Reduce EMI and Minimize SSO Effects
* All LVCMOS Inputs and Control Pins Have Internal Pulldow

📥 Download Datasheet

This datasheet PDF includes multiple part numbers: DS90C124, DS90C241. Please refer to the document for exact specifications by model.
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Datasheet Details

Part number
DS90C124, DS90C241
Manufacturer
Texas Instruments ↗
File Size
2.18 MB
Datasheet
DS90C241-etcTI.pdf
Description
5-MHz to 35-MHz DC-Balanced 24-Bit FPD-Link II Serializer/Deserializer
Note
This datasheet PDF includes multiple part numbers: DS90C124, DS90C241.
Please refer to the document for exact specifications by model.

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📌 All Tags

5-MHz 35-MHz DC-Balanced 24-Bit FPD-Link Serializer Deserializer Texas Instruments
Texas Instruments DS90C124-like datasheet

DS90C124 Stock/Price