Description
The DS90C241 and DS90C124 chipset translates a 24-bit parallel bus into a fully transparent data and control LVDS serial stream with embedded clock information..
Features
- 1 5-MHz to 35-MHz Clock Embedded and DCBalancing 24:1 and 1:24 Data Transmissions.
- User Defined Pre-Emphasis Driving Ability Through External Resistor on LVDS Outputs and Capable to Drive Up to 10-Meter Shielded Twisted-Pair Cable.
- User-Selectable Clock Edge for Parallel Data on Both Transmitter and Receiver.
- Internal DC Balancing Encode and Decode (Supports AC-Coupling Interface With No External Coding Required).
- Individual Power-Down Controls for Bo.
