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DS90C032QML LVDS Quad CMOS Differential Line Receiver

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Description

DS90C032QML www.ti.com SNLS203D * MARCH 2006 * REVISED APRIL 2013 DS90C032QML LVDS Quad CMOS Differential Line Receiver Check for S.
The DS90C032 is a quad CMOS differential line receiver designed for applications requiring ultra low power dissipation and high data rates.

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Features

* 1
* 2 Single Event Latchup (SEL) Immune 120 MeVcm2/mg
* High Impedance LVDS Inputs with Power-Off.
* Accepts Small Swing (330 mV) Differential Signal Levels
* Low Power Dissipation
* Low Differential Skew
* Low Chip to Chip Skew
* Pin Compatible

Applications

* requiring ultra low power dissipation and high data rates. The DS90C032 accepts low voltage differential input signals and translates them to CMOS (TTL compatible) output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs. The receiver also supports OPEN Failsaf

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