DS90C124 - 5-35MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer

National Semiconductor

Datasheet Details

Part number	DS90C124
Manufacturer	National Semiconductor
File Size	926.26 KB
Description	5-35MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer
Datasheet	DS90C124_NationalSemiconductor.pdf

The DS90C241/124 Chipset translates a 24-bit parallel bus into a fully transparent data/control LVDS serial stream with embedded clock information.

pre-emphasis to boost signals over longer distances using lossy cables. Internal DC balanced encoding/decoding is used to support AC-Coupled interconnects. n User selectable clock edge for parallel data on both Transmitter and Receiver n Internal DC Balancing encode/decode.
Supports AC-coupling interface with no external coding required n Individual power-down controls for both Transmitter and Receiver n Embedded clock CDR (clock and data recovery) on Receiver and no external source of.

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Published: Jun 29, 2007 |