SCAN18373T Datasheet - National Semiconductor

SCAN18373T Transparent Latch

The SCAN18373T is a high speed, low-power transparent latch featuring separate data inputs organized into dual 9-bit bytes with byte-oriented latch enable and output enable control signals. This device is compliant with IEEE 1149.1 Standard Test Access Port and Boundary Scan Architecture with the in.

SCAN18373T Features

* n n n n n n n n n n IEEE 1149.1 (JTAG) Compliant Buffered active-low latch enable TRI-STATE outputs for bus-oriented applications 9-bit data busses for parity applications Reduced-swing outputs source 24 mA/sink 48 mA Guaranteed to drive 50Ω transmission line to TTL input levels of 0.8V and 2.0V TTL

SCAN18373T_NationalSemiconductor.pdf