* 1
* 2 IEEE 1149.1 (JTAG) Compliant and At-Speed BIST Test Mode
* Clock Recovery From PLL Lock to Random Data Patterns
* Ensured Transition Every Data Transfer Cycle
* Chipset (Tx + Rx) Power Consumption < 500 mW (typ) @ 66 MHz
* Single Differential Pair Elimina
SCAN921224 Datasheet (1.08 MB)
SCAN921224
1.08 MB
20-66 mhz 10-bit bus lvds serializer and deserializer.
SCAN921023, SCAN921224 www.ti.com SNLS133D JAN 2001 REVISED APRIL 2013 SCAN921023 and SCAN921224 20-66 MHz 10 Bit Bus LVDS Seri.
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