MTB2N60E Datasheet - ON Semiconductor

MTB2N60E High Energy Power FET

MTB2N60E Designer’s™ Data Sheet TMOS E FET.™ High Energy Power FET D2PAK for Surface Mount N Channel Enhancement Mode Silicon Gate http://onsemi.com This high voltage MOSFET uses an advanced termination scheme to provide enhanced voltage blocking capability without degrading performance over time. In addition, this advanced TMOS E FET is designed to withstand high energy in the avalanche and commutation modes. The new energy efficient design also offers.

MTB2N60E Features

* Ts may be safely operated into an inductive load; however, snubbing reduces switching losses. td(off) = RG Ciss In (VGG/VGSP) C, CAPACITANCE (pF) C, CAPACITANCE (pF) 800 VDS = 0 V VGS = 0 V 700 Ciss 600 TJ = 25°C 500 400 Crss Ciss 300 200 Coss 100 Crss 0 10 5 0 5 10 15 20 25 VGS VDS GATE

MTB2N60E Datasheet (260.49 KB)