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NB6L16 6GHz/6Gbps 2.5V/3.3V Multi-level Input to Differential Lvecl Clock or Data Translator/receiver/driver Buffer

NB6L16 Description

m o .c 4U 2.5V / 3.3V tMultilevel Input to e Differential e LVPECL/LVNECL h Clock or S Data a t Receiver/Driver/Translator a Buffer .D w The NB6L16 is.
Pin 1 2 Name NC D I/O. LVDS, CML, LVPECL, LVNECL, LVTTL, LVCMOS Input LVDS, CML, LVPECL, LVNECL, LVTTL, LVCMOS Input. ECL.

NB6L16 Features

* perature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 8. Vth is applied to the complementary input when operating in single
* ended

NB6L16 Applications

* Input accept LVNECL (Negative ECL), LVPECL (Positive ECL), LVTTL, LVCMOS, CML, or LVDS. Outputs are 800 mV ECL signals. The VBB pin, an internally generated voltage supply, is available to this device only. For single
* ended input conditions, the unused differential input is connected to VBB

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Datasheet Details

Part number
NB6L16
Manufacturer
ON Semiconductor ↗
File Size
143.36 KB
Datasheet
NB6L16_ONSemiconductor.pdf
Description
6GHz/6Gbps 2.5V/3.3V Multi-level Input to Differential Lvecl Clock or Data Translator/receiver/driver Buffer

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6GHz 6Gbps 2.5V 3.3V Multi-level Input Differential Lvecl Clock Data Translator receiver driver Buffer ON Semiconductor
ON Semiconductor NB6L16-like datasheet