Description
2 system level description
2.1 format and frame rate 2.2 power up sequence
2.2.1 power up with internal DVDD 2.3 power management 2.4 power ON reset generation 2.5 DOVDD power requirements 2.6 system clock control 3 block level description 3.1 pixel array structure 4 image sensor core digital functions 4.1 mirror and flip 4.2 image windowing 4.3 test pattern 4.4 AEC/AGC algorithms
4.4.1 exposure control 4.4.2 exposure time 4.4.3 banding filter 4.4.4 manual exposure control 4.4.5 automatic expos
Features
- support for image sizes: VGA (640x480), QVGA (320x240) and QQVGA (160x120)
support for output formats: YUV4:2:2, Raw RGB, ITU656, RGB565
digital video port (DVP) parallel output interface
on-chip phase lock loop (PLL)
built-in 1.5V regulator for core
capable of maintaining register values at power down
programmable controls for frame rate, mirror and flip, AEC/AGC, and windowing
support for horizontal and vertical sub-sampling
automatic image control functions: automatic expos.