HD151BF854 Datasheet PDF - Renesas Technology 2.5 V PLL Clock Buffer for DDR Application Specs

HD151BF854 - 2.5 V PLL Clock Buffer for DDR Application

Datasheet Summary

Description

The HD151BF854 is a high-performance, low-skew, low-jitter, PLL clock buffer.

It is specifically designed for use with DDR (Double Data Rate) PC mother board application.

Features

Designed for DDR200/266/333/400 PC mother board clock buffering Supports 60 MHz to 210 MHz operation range Distributes one to six differential clock outputs pairs Spread spectrum clock compatible External feedback pin (FBIN) is used to synchronize the outputs to the clock input Supports 2.5 V analog supply voltage (AVDD), and 2.5 V VDD Ordering Information Package Type SSOP-28 pin Package Code SSOP-28 Package Abbreviation SS.

Datasheet Details

Part number	HD151BF854
Manufacturer	Renesas Technology
File Size	91.51 KB
Description	2.5 V PLL Clock Buffer for DDR Application
Datasheet	HD151BF854 Datasheet
Additional preview pages of the HD151BF854 datasheet.

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Full PDF Text Transcription

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To all our customers Regarding the change of names mentioned in the document, such as Hitachi Electric and Hitachi XX, to Renesas Technology Corp. The semiconductor operations of Mitsubishi Electric and Hitachi were transferred to Renesas Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog and discrete devices, and memory chips other than DRAMs (flash memory, SRAMs etc.) Accordingly, although Hitachi, Hitachi, Ltd., Hitachi Semiconductors, and other Hitachi brand names are mentioned in the document, these names have in fact all been changed to Renesas Technology Corp. Thank you for your understanding.

Published: Oct 1, 2005 |